On 2/2/2016 3:02 AM, Joshua Henderson wrote:
Document the devicetree bindings for the watchdog peripheral found on Microchip
PIC32 SoC class devices.
Signed-off-by: Joshua Henderson <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: <[email protected]>
---
Note: Please merge this patch series through the MIPS tree.
---
.../bindings/watchdog/microchip,pic32-wdt.txt | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
create mode 100644
Documentation/devicetree/bindings/watchdog/microchip,pic32-wdt.txt
diff --git a/Documentation/devicetree/bindings/watchdog/microchip,pic32-wdt.txt
b/Documentation/devicetree/bindings/watchdog/microchip,pic32-wdt.txt
new file mode 100644
index 0000000..3ce2839
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/microchip,pic32-wdt.txt
@@ -0,0 +1,18 @@
+* Microchip PIC32 Watchdog Timer
+
+When enabled, the watchdog peripheral can be used to reset the device if the
+WDT is not cleared periodically in software.
+
+Required properties:
+- compatible: must be "microchip,pic32mzda-wdt".
+- reg: physical base address of the controller and length of memory mapped
+ region.
+- clocks: phandle of source clk. should be <&LPRC> clk.
+
+Example:
+
+ watchdog0: wdt@1f800800 {
The ePAPR standard tells to to use "watchdog@1f800800" as the node name.
[...]
MBR, Sergei
