Thanks for your review.
On 2016/2/12 0:59, Lee Jones wrote:
> On Mon, 01 Feb 2016, Chen Feng wrote:
>
>> DT bindings for hisilicon hi655x MFD PMIC chip.
>>
>> Signed-off-by: Chen Feng <[email protected]>
>> Signed-off-by: Fei Wang <[email protected]>
>> Signed-off-by: Xinwei Kong <[email protected]>
>> Reviewed-by: Haojian Zhuang <[email protected]>
>> ---
>> .../devicetree/bindings/mfd/hisilicon,hi655x.txt | 27
>> ++++++++++++++++++++++
>> 1 file changed, 27 insertions(+)
>> create mode 100644
>> Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt
>>
>> diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt
>> b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt
>> new file mode 100644
>> index 0000000..5edc310
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt
>> @@ -0,0 +1,27 @@
>> +Hisilicon hi655x Power Management Integrated Circuit (PMIC)
>> +
>> +The hardware layout for access PMIC Hi655x from AP SoC Hi6220.
>> +Between PMIC Hi655x and Hi6220, the physical signal channel is SSI.
>> +We can use memory-mapped I/O to communicate.
>> +
>> ++----------------+ +-------------+
>> +| | | |
>> +| Hi6220 | SSI bus | Hi655x |
>> +| |-------------| |
>> +| |(REGMAP_MMIO)| |
>> ++----------------+ +-------------+
>> +
>> +Required properties:
>> +- compatible: Should be "hisilicon,hi655x-pmic"
>> +- reg: Base address of PMIC on hi6220 soc
>
> s/hi6220 soc/Hi6220 SoC/
>
>> +- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain).
>> +- pmic-gpios: The gpio used by PMIC irq.
>
> s/gpio/GPIO/
> s/irq/IRQ/
>
I will change this and send a new V8 version.
> These are always easier to read in this format:
>
> - compatible: Should be "hisilicon,hi655x-pmic"
> - reg: Base address of PMIC on hi6220 soc
> - interrupt-controller: Hi655x has internal IRQs (has own IRQ domain).
> - pmic-gpios: The gpio used by PMIC irq.
>
>> +Example:
>> + pmic: pmic@f8000000 {
>> + compatible = "hisilicon,hi655x-pmic";
>> + reg = <0x0 0xf8000000 0x0 0x1000>;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
>> + }
>
