Store the pmu in event->pmu_private, so we can get rid of the per cpu data storage.
Signed-off-by: Thomas Gleixner <[email protected]> --- arch/x86/kernel/cpu/perf_event_intel_uncore.c | 15 +-------------- arch/x86/kernel/cpu/perf_event_intel_uncore.h | 12 ++++++++++-- arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c | 1 + 3 files changed, 12 insertions(+), 16 deletions(-) Index: b/arch/x86/kernel/cpu/perf_event_intel_uncore.c =================================================================== --- a/arch/x86/kernel/cpu/perf_event_intel_uncore.c +++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.c @@ -92,11 +92,6 @@ ssize_t uncore_event_show(struct kobject return sprintf(buf, "%s", event->config); } -struct intel_uncore_pmu *uncore_event_to_pmu(struct perf_event *event) -{ - return container_of(event->pmu, struct intel_uncore_pmu, pmu); -} - struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu) { struct intel_uncore_box *box; @@ -122,15 +117,6 @@ struct intel_uncore_box *uncore_pmu_to_b return *per_cpu_ptr(pmu->box, cpu); } -struct intel_uncore_box *uncore_event_to_box(struct perf_event *event) -{ - /* - * perf core schedules event on the basis of cpu, uncore events are - * collected by one of the cpus inside a physical package. - */ - return uncore_pmu_to_box(uncore_event_to_pmu(event), smp_processor_id()); -} - u64 uncore_msr_read_counter(struct intel_uncore_box *box, struct perf_event *event) { u64 count; @@ -690,6 +676,7 @@ static int uncore_pmu_event_init(struct if (!box || box->cpu < 0) return -EINVAL; event->cpu = box->cpu; + event->pmu_private = box; event->hw.idx = -1; event->hw.last_tag = ~0ULL; Index: b/arch/x86/kernel/cpu/perf_event_intel_uncore.h =================================================================== --- a/arch/x86/kernel/cpu/perf_event_intel_uncore.h +++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.h @@ -319,9 +319,17 @@ static inline bool uncore_box_is_fake(st return (box->phys_id < 0); } -struct intel_uncore_pmu *uncore_event_to_pmu(struct perf_event *event); +static inline struct intel_uncore_pmu *uncore_event_to_pmu(struct perf_event *event) +{ + return container_of(event->pmu, struct intel_uncore_pmu, pmu); +} + +static inline struct intel_uncore_box *uncore_event_to_box(struct perf_event *event) +{ + return event->pmu_private; +} + struct intel_uncore_box *uncore_pmu_to_box(struct intel_uncore_pmu *pmu, int cpu); -struct intel_uncore_box *uncore_event_to_box(struct perf_event *event); u64 uncore_msr_read_counter(struct intel_uncore_box *box, struct perf_event *event); void uncore_pmu_start_hrtimer(struct intel_uncore_box *box); void uncore_pmu_cancel_hrtimer(struct intel_uncore_box *box); Index: b/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c =================================================================== --- a/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c +++ b/arch/x86/kernel/cpu/perf_event_intel_uncore_snb.c @@ -313,6 +313,7 @@ static int snb_uncore_imc_event_init(str return -EINVAL; event->cpu = box->cpu; + event->pmu_private = pmu; event->hw.idx = -1; event->hw.last_tag = ~0ULL;
