Hi Max, Thank you for the info! CC Philip for following this issue.
Thanks, Fengguang On Sun, Mar 20, 2016 at 02:54:54PM +0300, Max Filippov wrote: > Hi Fengguang, > > On Sun, Mar 20, 2016 at 8:34 AM, kbuild test robot > <fengguang...@intel.com> wrote: > > Hi Max, > > > > FYI, the error/warning still remains. > > Each xtensa core configuration requires corresponding toolchain to be > built correctly. > In this case the toolchain needs to be built for de212 core with the > following overlay: > > https://github.com/jcmvbkbc/xtensa-toolchain-build/blob/master/overlays/xtensa_de212.tar.gz > > > tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git > > master > > head: 1e75a9f34a5ed5902707fb74b468356c55142b71 > > commit: ca55b2fef3a9373fcfc30f82fd26bc7fccbda732 xtensa: add de212 core > > variant > > date: 5 months ago > > config: xtensa-nommu_kc705_defconfig (attached as .config) > > reproduce: > > wget > > https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross > > -O ~/bin/make.cross > > chmod +x ~/bin/make.cross > > git checkout ca55b2fef3a9373fcfc30f82fd26bc7fccbda732 > > # save the attached .config to linux build tree > > make.cross ARCH=xtensa > > > > All errors (new ones prefixed by >>): > > > > arch/xtensa/include/asm/initialize_mmu.h: Assembler messages: > >>> arch/xtensa/include/asm/initialize_mmu.h:55: Error: invalid register > >>> 'atomctl' for 'wsr' instruction > > > > vim +55 arch/xtensa/include/asm/initialize_mmu.h > > > > 6cb97111 Baruch Siach 2013-12-29 39 > > c622b29d Max Filippov 2012-11-19 40 #ifdef __ASSEMBLY__ > > c622b29d Max Filippov 2012-11-19 41 > > c622b29d Max Filippov 2012-11-19 42 #define XTENSA_HWVERSION_RC_2009_0 > > 230000 > > c622b29d Max Filippov 2012-11-19 43 > > c622b29d Max Filippov 2012-11-19 44 .macro initialize_mmu > > c622b29d Max Filippov 2012-11-19 45 > > c622b29d Max Filippov 2012-11-19 46 #if XCHAL_HAVE_S32C1I && > > (XCHAL_HW_MIN_VERSION >= XTENSA_HWVERSION_RC_2009_0) > > c622b29d Max Filippov 2012-11-19 47 /* > > c622b29d Max Filippov 2012-11-19 48 * We Have Atomic Operation Control > > (ATOMCTL) Register; Initialize it. > > c622b29d Max Filippov 2012-11-19 49 * For details see > > Documentation/xtensa/atomctl.txt > > c622b29d Max Filippov 2012-11-19 50 */ > > c622b29d Max Filippov 2012-11-19 51 #if XCHAL_DCACHE_IS_COHERENT > > c622b29d Max Filippov 2012-11-19 52 movi a3, 0x25 /* For > > SMP/MX -- internal for writeback, > > c622b29d Max Filippov 2012-11-19 53 * RCW > > otherwise > > c622b29d Max Filippov 2012-11-19 54 */ > > c622b29d Max Filippov 2012-11-19 @55 #else > > c622b29d Max Filippov 2012-11-19 56 movi a3, 0x29 /* non-MX > > -- Most cores use Std Memory > > c622b29d Max Filippov 2012-11-19 57 * > > Controlers which usually can't use RCW > > c622b29d Max Filippov 2012-11-19 58 */ > > c622b29d Max Filippov 2012-11-19 59 #endif > > c622b29d Max Filippov 2012-11-19 60 wsr a3, atomctl > > c622b29d Max Filippov 2012-11-19 61 #endif /* XCHAL_HAVE_S32C1I && > > c622b29d Max Filippov 2012-11-19 62 * (XCHAL_HW_MIN_VERSION >= > > XTENSA_HWVERSION_RC_2009_0) > > c622b29d Max Filippov 2012-11-19 63 */ > > > > :::::: The code at line 55 was first introduced by commit > > :::::: c622b29d1f38021411965b7e0170ab055551b257 xtensa: initialize atomctl > > SR > > > > :::::: TO: Max Filippov <jcmvb...@gmail.com> > > :::::: CC: Chris Zankel <ch...@zankel.net> > > > > --- > > 0-DAY kernel test infrastructure Open Source Technology > > Center > > https://lists.01.org/pipermail/kbuild-all Intel > > Corporation > > > > -- > Thanks. > -- Max > _______________________________________________ > kbuild-all mailing list > kbuild-...@lists.01.org > https://lists.01.org/mailman/listinfo/kbuild-all