3.2.79-rc1 review patch. If anyone has any objections, please let me know.
------------------ From: CQ Tang <[email protected]> commit fda3bec12d0979aae3f02ee645913d66fbc8a26e upstream. This is a 32-bit register. Apparently harmless on real hardware, but causing justified warnings in simulation. Signed-off-by: CQ Tang <[email protected]> Signed-off-by: David Woodhouse <[email protected]> [bwh: Backported to 3.2: adjust filename] Signed-off-by: Ben Hutchings <[email protected]> --- drivers/iommu/dmar.c | 2 +- drivers/iommu/intr_remapping.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) --- a/drivers/iommu/dmar.c +++ b/drivers/iommu/dmar.c @@ -923,7 +923,7 @@ void dmar_disable_qi(struct intel_iommu raw_spin_lock_irqsave(&iommu->register_lock, flags); - sts = dmar_readq(iommu->reg + DMAR_GSTS_REG); + sts = readl(iommu->reg + DMAR_GSTS_REG); if (!(sts & DMA_GSTS_QIES)) goto end; --- a/drivers/iommu/intr_remapping.c +++ b/drivers/iommu/intr_remapping.c @@ -496,7 +496,7 @@ static void iommu_disable_intr_remapping raw_spin_lock_irqsave(&iommu->register_lock, flags); - sts = dmar_readq(iommu->reg + DMAR_GSTS_REG); + sts = readl(iommu->reg + DMAR_GSTS_REG); if (!(sts & DMA_GSTS_IRES)) goto end;
