For IP + one insturction fixup there is need to know in which state (compat/native) is application. Now it's done with TIF_IA32 test, which is buggy, as the process may change it's CS register to __USER32_CS descriptor (and vice-versa) so instruction interpreter will fail to correctly fixup IP. Changing to user_64bit_mode to check for interrupt register set is better, however it may race with task, that changes it's code selector frequiently.
Signed-off-by: Dmitry Safonov <[email protected]> --- arch/x86/events/intel/ds.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c index 8584b90d8e0b..e903a8d3b4b0 100644 --- a/arch/x86/events/intel/ds.c +++ b/arch/x86/events/intel/ds.c @@ -962,7 +962,7 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs) old_to = to; #ifdef CONFIG_X86_64 - is_64bit = kernel_ip(to) || !test_thread_flag(TIF_IA32); + is_64bit = kernel_ip(to) || user_64bit_mode(regs); #endif insn_init(&insn, kaddr, size, is_64bit); insn_get_length(&insn); -- 2.8.0
