On Fri, May 06, 2016 at 11:18:47AM -0400, Jason Baron wrote:
> Skylake adjusts some register locations, but otherwise follows the
> existing model quite closely. I was able to verify that the 'ce_count'
> increments when 'bad dimms' are used. The accounting of 'ce_count' and
> 'ue_count' is the primary functionality of interesest for us.
> Tested on Intel(R) Xeon(R) CPU E3-1260L v5 @ 2.90GHz.
>
> Signed-off-by: Jason Baron <[email protected]>
> Acked-by: Tony Luck <[email protected]>
> ---
> drivers/edac/ie31200_edac.c | 121
> ++++++++++++++++++++++++++++++++------------
> 1 file changed, 90 insertions(+), 31 deletions(-)
Applied, thanks.
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
