On Tue, May 31, 2016 at 10:05 AM, Masahiro Yamada <[email protected]> wrote:
> PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration > (pin biasing, drive strength control), but not pin-muxing. > > Allow to fill the mux value table with -1 for those pins; pins with > mux value -1 will be skipped in the pin-mux set function. The mux > value type should be changed from "unsigned" to "int" in order to > accommodate -1 as a special case. > > Signed-off-by: Masahiro Yamada <[email protected]> Patch applied. Yours, Linus Walleij
