On msm8916 SCM acts as a controller for the MSS_RESET found in the GCC,
update the DT node so that we can address this.

Signed-off-by: Bjorn Andersson <bjorn.anders...@linaro.org>
---
 arch/arm64/boot/dts/qcom/msm8916.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi 
b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 4f2882605138..1e67acc19a9d 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -192,10 +192,11 @@
        };
 
        firmware {
-               scm {
+               scm: scm {
                        compatible = "qcom,scm";
                        clocks = <&gcc GCC_CRYPTO_CLK>, <&gcc 
GCC_CRYPTO_AXI_CLK>, <&gcc GCC_CRYPTO_AHB_CLK>;
                        clock-names = "core", "bus", "iface";
+                       #reset-cells = <1>;
                };
        };
 
-- 
2.5.0

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