On Mon, Jul 18, 2016 at 7:20 PM, Ray Jui <[email protected]> wrote:
> The iProc GPIO controller is shared among multiple iProc based SoCs. > In the NSP integration, the drive strength pinctrl function is > disabled. In the integration of Stingray, pinctrl is handled by another > block and this GPIO controller is solely used as a GPIO controller, and > therefore should not be registered to the pinconf framework > > This patch introduces new SoC specific compatible strings > "brcm,iproc-nsp-gpio" for NSP with drive strength feature disabled and > "brcm,iproc-stingray-gpio" for Stingray with all PINCONF features > disabled > > This patch is developed based on the initial work from Yendapally > Reddy Dhananjaya <[email protected]> who attempted to > disable drive strength configuration for the iProc based NSP chip. In > addition, Pramod Kumar <[email protected]> also contributed to > make the support more generic across all currently supported PINCONF > functions in the iProc GPIO/PINCONF driver > > Signed-off-by: Pramod Kumar <[email protected]> > Signed-off-by: Ray Jui <[email protected]> Patch applied. I see no reason to hold it back, if it survives the test builds. Yours, Linus Walleij
