Storing the system clock frequency in struct octeon_spi avoids
calling the MIPS specific octeon_get_io_clock_rate() for every transfer.

Signed-off-by: Jan Glauber <jglau...@cavium.com>
Tested-by: Steven J. Hill <steven.h...@cavium.com>
---
 drivers/spi/spi-octeon.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/spi-octeon.c b/drivers/spi/spi-octeon.c
index b53ba53..e722040 100644
--- a/drivers/spi/spi-octeon.c
+++ b/drivers/spi/spi-octeon.c
@@ -30,6 +30,7 @@ struct octeon_spi {
        void __iomem *register_base;
        u64 last_cfg;
        u64 cs_enax;
+       int sys_freq;
 };
 
 static void octeon_spi_wait_ready(struct octeon_spi *p)
@@ -53,7 +54,6 @@ static int octeon_spi_do_transfer(struct octeon_spi *p,
        union cvmx_mpi_cfg mpi_cfg;
        union cvmx_mpi_tx mpi_tx;
        unsigned int clkdiv;
-       unsigned int speed_hz;
        int mode;
        bool cpha, cpol;
        const u8 *tx_buf;
@@ -65,9 +65,7 @@ static int octeon_spi_do_transfer(struct octeon_spi *p,
        cpha = mode & SPI_CPHA;
        cpol = mode & SPI_CPOL;
 
-       speed_hz = xfer->speed_hz;
-
-       clkdiv = octeon_get_io_clock_rate() / (2 * speed_hz);
+       clkdiv = p->sys_freq / (2 * xfer->speed_hz);
 
        mpi_cfg.u64 = 0;
 
@@ -194,6 +192,7 @@ static int octeon_spi_probe(struct platform_device *pdev)
        }
 
        p->register_base = reg_base;
+       p->sys_freq = octeon_get_io_clock_rate();
 
        master->num_chipselect = 4;
        master->mode_bits = SPI_CPHA |
-- 
2.9.0.rc0.21.g7777322

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