Hi Greg,
Here are changelog for this patch.
Best Regards
Le 27/07/2016 à 23:28, Greg KH a écrit :
> On Wed, Jul 27, 2016 at 10:58:42PM +0200, Pascal JEAN wrote:
>> Signed-off-by: Pascal JEAN <epsilo...@gmail.com>
>> ---
>> drivers/tty/serial/sc16is7xx.c | 16 +++++++++-------
>> 1 file changed, 9 insertions(+), 7 deletions(-)
>
> I can't take patches with out any changelog text, sorry, please add the
> information you had in patch 0/2 to the text in these two patches, plus
> any other information that might be needed.
>
> Also, your Signed-off-by: and From: email addresses don't match, please
> fix that up somehow.
>
> thanks,
>
> greg k-h
>
Changelog:
sc16is7xx: fix RTS/CTS implementation
RTS/CTS handshaking for sc16is7xx driver does not work,
no character is sent regardless of the state of CTS.
Fixes:
1- sc16is7xx_set_baud() overwrites the flow control
configuration bits in EFR.
Writing in EFR has been replaced by an update.
2- As noted in the file Documentation/serial/driver,
get_mctrl() should return an active state for
unsupported entries.
After those changes everything works.
Signed-off-by: Pascal JEAN <epsilo...@gmail.com>
---
drivers/tty/serial/sc16is7xx.c | 16 +++++++++-------
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/tty/serial/sc16is7xx.c b/drivers/tty/serial/sc16is7xx.c
index f36e6df..3e65079 100644
--- a/drivers/tty/serial/sc16is7xx.c
+++ b/drivers/tty/serial/sc16is7xx.c
@@ -511,16 +511,18 @@ static int sc16is7xx_set_baud(struct uart_port
*port, int baud)
/* Enable enhanced features */
regcache_cache_bypass(s->regmap, true);
- sc16is7xx_port_write(port, SC16IS7XX_EFR_REG,
- SC16IS7XX_EFR_ENABLE_BIT);
+ sc16is7xx_port_update(port, SC16IS7XX_EFR_REG,
+ SC16IS7XX_EFR_ENABLE_BIT,
+ SC16IS7XX_EFR_ENABLE_BIT);
+ sc16is7xx_port_update(port, SC16IS7XX_MCR_REG,
+ SC16IS7XX_MCR_CLKSEL_BIT,
+ prescaler);
+ sc16is7xx_port_update(port, SC16IS7XX_EFR_REG,
+ SC16IS7XX_EFR_ENABLE_BIT, 0);
regcache_cache_bypass(s->regmap, false);
/* Put LCR back to the normal mode */
sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr);
- sc16is7xx_port_update(port, SC16IS7XX_MCR_REG,
- SC16IS7XX_MCR_CLKSEL_BIT,
- prescaler);
/* Open the LCR divisors for configuration */
sc16is7xx_port_write(port, SC16IS7XX_LCR_REG,
@@ -817,9 +819,9 @@ static unsigned int sc16is7xx_tx_empty(struct
uart_port *port)
static unsigned int sc16is7xx_get_mctrl(struct uart_port *port)
{
/* DCD and DSR are not wired and CTS/RTS is handled automatically
- * so just indicate DSR and CAR asserted
+ * so just indicate all inputs asserted
*/
- return TIOCM_DSR | TIOCM_CAR;
+ return TIOCM_DSR | TIOCM_CAR | TIOCM_RI | TIOCM_CTS;
}
static void sc16is7xx_set_mctrl(struct uart_port *port, unsigned int mctrl)
--
2.7.4
