On Fri, Aug 05, 2016 at 03:37:39PM +0200, Sebastian Andrzej Siewior wrote:
> diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
> index 4e5be94e079a..1ee065954e24 100644
> --- a/arch/x86/include/asm/tlbflush.h
> +++ b/arch/x86/include/asm/tlbflush.h
> @@ -135,7 +135,14 @@ static inline void cr4_set_bits_and_update_boot(unsigned
> long mask)
>
> static inline void __native_flush_tlb(void)
> {
> + /*
> + * if current->mm == NULL then we borrow a mm which may change during a
> + * task switch and therefore we must not be preempted while we write CR3
> + * back.
> + */
> + preempt_disable();
> native_write_cr3(native_read_cr3());
> + preempt_enable();
> }
Acked-by: Peter Zijlstra (Intel) <[email protected]>
