On Fri, Aug 12, 2016 at 10:59:46AM +0800, Boqun Feng wrote: > But if an arch implements its spin_lock() with a full barrier, even > though the atomic is implemented by ll/sc, the STORE part of which can't > be reordered with memory operations in the critcal sections. I think > maybe that's the case for alpha(and also for ARM32).
Correct, Alpha only has a full fence and uses that after the ll/sc to provide acquire semantics, ARM has other barriers but too uses a full barrier here.
