Eric W. Biederman wrote:
> Well you shouldn't need to wait just run with a kernel with NR_IRQS >= 1024.
> 1024 is stretch but it isn't to bad. There are already x86 boxes that have
> more pins on their ioapics then that. So x86_64 and with this latest
> round of patches from Len Brown and I i386 should be able to support that.
>
Early Xen patches did just that, but there was general criticism about
the memory use. And in the paravirt_ops world, a large compile-time
static allocation is not really acceptable if its only needed by Xen.
But, hey, if you're OK with it I'll submit the patch ;)
> On the other side 1024 looks extremely limiting for exposing pci devices.
> If someone gets serious about pushing what is legal with MSI-X you may be
> in trouble. As a single device is allowed to have 4096 interrupts. Not
> that I can think of a user for so many but...
>
No, I think we'll burn that bridge when we come to it.
J
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