On Wed, Sep 07, 2016 at 11:22:19AM +0200, Borislav Petkov wrote: > From: Borislav Petkov <[email protected]> > > It means different things on Intel and AMD so write it down so that > there's no confusion. > > Signed-off-by: Borislav Petkov <[email protected]> > Cc: Peter Zijlstra <[email protected]> > Cc: Thomas Gleixner <[email protected]> > --- > Documentation/x86/topology.txt | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/x86/topology.txt b/Documentation/x86/topology.txt > index 06afac252f5b..7a5485730476 100644 > --- a/Documentation/x86/topology.txt > +++ b/Documentation/x86/topology.txt > @@ -63,6 +63,12 @@ The topology of a system is described in the units of: > The maximum possible number of packages in the system. Helpful for per > package facilities to preallocate per package information. > > + - cpu_llc_id: > + > + A per-CPU variable containing: > + - On Intel, the first APIC ID of the list of CPUs sharing the Last Level > + Cache > + - On AMD, the Node ID containing the Last Level Cache.
And there are no AMD parts where there are multiple LLCs on a Node? Like where there isn't an L3 and the L2 is only per cluster?
