On Sun, 18 Feb 2007 09:32:15 -0800 H. Peter Anvin wrote: > Jean Delvare wrote: > > On Thu, 15 Feb 2007 06:34:35 -0800, H. Peter Anvin wrote: > >> Jean Delvare wrote: > >>> On x86, the BIOS led state can be read from byte 0x97 the BIOS RAM. The > >>> BIOS RAM is mapped at 0x400 so all we need to do is to one byte from > >>> RAM (offset 0x497). This is how Suse's hwinfo does. > >> Perhaps that's what Suse does, but the proper address is 0x417. > >> > >> 0x497 is the rarely-used LPT2 timeout counter. > > > > Still, the information printed by hwinfo is correct, I've tested it > > myself. Is there some publicly available documentation about the x86 > > BIOS RAM mapping? > > > > Google for Ralf Brown's Interrupt List.
(Ralph) I didn't find the BIOS data areas/tables in Ralph's web pages... --- ~Randy *** Remember to use Documentation/SubmitChecklist when testing your code *** - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
