From: Borislav Petkov <[email protected]>
Hi guys,
here's the RAS pile of patches ready for 4.9. It is mainly Scalable MCA
enablement for the upcoming AMD F17h machines.
Please apply,
thanks.
Borislav Petkov (1):
x86/RAS/mce_amd_inj: Fix some W= warnings
Yazen Ghannam (14):
x86/mce/AMD: Use msr_ops.misc() in allocate_threshold_blocks()
x86/mce: Add support for new MCA_SYND register
EDAC/mce_amd: Print syndrome register value on SMCA systems
x86/RAS: Add syndrome support to mce_amd_inj
x86/mce/AMD: Read MSRs on the CPU allocating the threshold blocks
EDAC/mce_amd: Add missing SMCA error descriptions
EDAC/mce_amd: Use SMCA prefix for error descriptions arrays
x86/mce/AMD, EDAC/mce_amd: Define and use tables for known SMCA IP
types
x86/mce/AMD: Update sysfs bank names for SMCA systems
x86/mce/AMD: Ensure the deferred error interrupt is of type APIC on
SMCA systems
x86/mce/AMD: Save MCA_IPID in MCE struct on SMCA systems
x86/mce, EDAC/mce_amd: Print MCA_SYND and MCA_IPID during MCE on SMCA
systems
x86/mce/AMD: Extract the error address on SMCA systems
x86/MCE/AMD, EDAC: Handle reserved bank 4 on Fam17h properly
arch/x86/include/asm/mce.h | 66 +++++-----
arch/x86/include/uapi/asm/mce.h | 2 +
arch/x86/kernel/cpu/mcheck/mce.c | 25 ++++
arch/x86/kernel/cpu/mcheck/mce_amd.c | 204 +++++++++++++++++++++++------
arch/x86/ras/mce_amd_inj.c | 42 +++---
drivers/edac/mce_amd.c | 244 ++++++++++-------------------------
include/trace/events/mce.h | 9 +-
7 files changed, 335 insertions(+), 257 deletions(-)
--
2.10.0
