From: Fu Wei <fu....@linaro.org>

To support the arm_arch_timer via ACPI we need to share defines and enums
between the driver and the ACPI parser code.

Split out the relevant defines and enums into arm_arch_timer.h.
No functional change.

Signed-off-by: Fu Wei <fu....@linaro.org>
---
 drivers/clocksource/arm_arch_timer.c | 11 -----------
 include/clocksource/arm_arch_timer.h | 11 +++++++++++
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
index 5770054..aea6c10 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -51,8 +51,6 @@
 #define CNTV_TVAL      0x38
 #define CNTV_CTL       0x3c
 
-#define ARCH_CP15_TIMER        BIT(0)
-#define ARCH_MEM_TIMER BIT(1)
 static unsigned arch_timers_present __initdata;
 
 static void __iomem *arch_counter_base;
@@ -65,15 +63,6 @@ struct arch_timer {
 #define to_arch_timer(e) container_of(e, struct arch_timer, evt)
 
 static u32 arch_timer_rate;
-
-enum ppi_nr {
-       PHYS_SECURE_PPI,
-       PHYS_NONSECURE_PPI,
-       VIRT_PPI,
-       HYP_PPI,
-       MAX_TIMER_PPI
-};
-
 static int arch_timer_ppi[MAX_TIMER_PPI];
 
 static struct clock_event_device __percpu *arch_timer_evt;
diff --git a/include/clocksource/arm_arch_timer.h 
b/include/clocksource/arm_arch_timer.h
index caedb74..6f06481 100644
--- a/include/clocksource/arm_arch_timer.h
+++ b/include/clocksource/arm_arch_timer.h
@@ -19,6 +19,9 @@
 #include <linux/timecounter.h>
 #include <linux/types.h>
 
+#define ARCH_CP15_TIMER                        BIT(0)
+#define ARCH_MEM_TIMER                 BIT(1)
+
 #define ARCH_TIMER_CTRL_ENABLE         (1 << 0)
 #define ARCH_TIMER_CTRL_IT_MASK                (1 << 1)
 #define ARCH_TIMER_CTRL_IT_STAT                (1 << 2)
@@ -34,6 +37,14 @@ enum arch_timer_reg {
        ARCH_TIMER_REG_TVAL,
 };
 
+enum ppi_nr {
+       PHYS_SECURE_PPI,
+       PHYS_NONSECURE_PPI,
+       VIRT_PPI,
+       HYP_PPI,
+       MAX_TIMER_PPI
+};
+
 #define ARCH_TIMER_PHYS_ACCESS         0
 #define ARCH_TIMER_VIRT_ACCESS         1
 #define ARCH_TIMER_MEM_PHYS_ACCESS     2
-- 
2.7.4

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