From: Lijun Ou <ouli...@huawei.com>
This patch mainly modifies the logic for allocating uar registers.
In HiP06 SoC, HW has 8 group of uar registers for kernel and
user space application. The uar index is assigned as follows:
0 ------ for kernel
1~7 ------ for user space application
Signed-off-by: Lijun Ou <ouli...@huawei.com>
Reviewed-by: Wei Hu <xavier.hu...@huawei.com>
Signed-off-by: Salil Mehta <salil.me...@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_pd.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_pd.c
b/drivers/infiniband/hw/hns/hns_roce_pd.c
index 16271b5..4109f74 100644
--- a/drivers/infiniband/hw/hns/hns_roce_pd.c
+++ b/drivers/infiniband/hw/hns/hns_roce_pd.c
@@ -117,7 +117,9 @@ int hns_roce_uar_alloc(struct hns_roce_dev *hr_dev, struct
hns_roce_uar *uar)
if (ret == -1)
return -ENOMEM;
- uar->index = (uar->index - 1) % hr_dev->caps.phy_num_uars + 1;
+ if (uar->index > 0)
+ uar->index = (uar->index - 1) %
+ (hr_dev->caps.phy_num_uars - 1) + 1;
res = platform_get_resource(hr_dev->pdev, IORESOURCE_MEM, 0);
uar->pfn = ((res->start) >> PAGE_SHIFT) + uar->index;
--
1.9.1
