Hi Paul,

with commit 'MIPS: Malta: Use syscon-reboot driver to reboot' in -next, the 
value written
into the reset register is changed from 0x42 to 0x4d. Is this change on purpose,
or a copy-and-paste error from the SEAD3 changes ?

Reason for asking is that qemu only accepts a value of 0x42, which causes the 
in qemu to fail. Question is if qemu or the new reset value is wrong.

What values are valid ? Can you shed a light ?

Second question is endianness. Even when changing the value to 0x42, the system 
did not reboot for me. After a while I found out that I needed to add 
to the syscon node when running a big endian image. However, when running a
little endian image, "big-endian" did not work. In that case, I had to use the 
which is little endian.

Which makes me really wonder how this is expected to work. Does the real 
hardware accept
any value written into the reset register ?


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