On Fri, 14 Oct 2016, Fenghua Yu wrote: > Subject: x86, intel_cacheinfo: Enable cache id in x86
That should be: x86/intel_cacheinfo: Enable cache id in cache info > Cache id is retrieved from APIC ID and CPUID leaf 4 on x86. > > For more details see the section on "Cache ID Extraction Parameters" in > "Intel 64 Architecture Processor Topology Enumeration" at > https://software.intel.com/sites/default/files/63/1a/Kuo_CpuTopology_rc1.rh1.final.pdf That link is going to be stale before this hits Linus tree. > Also "Intel 64 and IA-32 Architectures Software Developer's Manual" volume 2, > table 3-18 "information Returned by CPUID Instruction" at Table 3-18 FADD/FADDP/FIADD Results ... The correct one is: Table 3-8 Information Returned by CPUID Instruction ... > http://www.intel.com/sdm So can we please just say: For more details please see the documentation of the CPUID instruction in the "Intel 64 and IA-32 Architectures Software Developer's Manual". and be done with it? Thanks, tglx
