On 09/30, Gregory CLEMENT wrote:
> For the gate part of the peripheral clock setting the bit disables the
> clock and clearing it enables the clock. This is not the default behavior
> of clk_gate component, so we need to use the CLK_GATE_SET_TO_DISABLE flag.
> Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
> ---

Applied to clk-fixes

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