Fintek F81504/508/512 PCIe-to-UART/GPIO will failed to work on Intel Skylake platform PEG PCIe port after D0->D3->D0.
This patch will prevent it into D3 mode. Signed-off-by: Ji-Ze Hong (Peter Hong) <[email protected]> --- drivers/pci/quirks.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 182712e..ee9402f 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -4497,3 +4497,18 @@ static void quirk_aer_report(struct pci_dev *pdev) quirk_aer_report); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_FINTEK, PCI_DEVICE_ID_F81512, quirk_aer_report); + +/* + * Fintek F81504/508/512 PCIe-to-UART/GPIO will failed to work on Intel Skylake + * platform PEG PCIe port after D0->D3->D0. + */ +static void quirk_no_d3(struct pci_dev *pdev) +{ + pdev->dev_flags |= PCI_DEV_FLAGS_NO_D3; +} +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_FINTEK, PCI_DEVICE_ID_F81504, + quirk_no_d3); +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_FINTEK, PCI_DEVICE_ID_F81508, + quirk_no_d3); +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_FINTEK, PCI_DEVICE_ID_F81512, + quirk_no_d3); -- 1.9.1
