> -----Original Message-----
> From: Andy Shevchenko [mailto:[email protected]]
> Sent: Friday, November 18, 2016 7:22 PM
> To: Tan, Jui Nee <[email protected]>; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]; [email protected]; [email protected];
> [email protected]; [email protected]
> Cc: [email protected]; [email protected];
> [email protected]; Yong, Jonathan <[email protected]>;
> Yu, Ong Hock <[email protected]>; Luck, Tony <[email protected]>;
> Wan Mohamad, Wan Ahmad Zainie <[email protected]>;
> Sun, Yunying <[email protected]>
> Subject: Re: [PATCH v11 1/6] drivers/platform/x86/p2sb: New Primary to
> Sideband bridge support driver for Intel SOC's
>
> On Fri, 2016-11-18 at 13:22 +0800, Tan Jui Nee wrote:
> > From: Andy Shevchenko <[email protected]>
> >
> > There is already one and at least one more user coming which require
> > an access to Primary to Sideband bridge (P2SB) in order to get IO or
> > MMIO bar hidden by BIOS.
> > Create a driver to access P2SB for x86 devices.
> >
> > Signed-off-by: Yong, Jonathan <[email protected]>
> > Signed-off-by: Andy Shevchenko <[email protected]>
> > ---
> > Changes in V11:
> > - No change
>
> Any particular reason you ignored my comments to v10 of this patch?
>
Hi Andy,
I am sorry for missing your comments as the email filtered into other folder
and I was not aware of that. I will applied your comments into next patch
version.
> --
> Andy Shevchenko <[email protected]>
> Intel Finland Oy
