From: Colin Ian King <[email protected]>
When x86_pmu.num_counters is set to INTEL_PMC_MAX_GENERIC we end up
with the 32 bit integer constant 1 being shifted 32 places leading to
undefined behaviour. Fix this by shifting 1ULL instead of 1.
Fixes CoverityScan CID#1192105 ("Bad bit shift operation")
Signed-off-by: Colin Ian King <[email protected]>
---
arch/x86/events/intel/core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 8613826..d611cab 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -3987,7 +3987,7 @@ __init int intel_pmu_init(void)
x86_pmu.num_counters, INTEL_PMC_MAX_GENERIC);
x86_pmu.num_counters = INTEL_PMC_MAX_GENERIC;
}
- x86_pmu.intel_ctrl = (1 << x86_pmu.num_counters) - 1;
+ x86_pmu.intel_ctrl = (1ULL << x86_pmu.num_counters) - 1;
if (x86_pmu.num_counters_fixed > INTEL_PMC_MAX_FIXED) {
WARN(1, KERN_ERR "hw perf events fixed %d > max(%d), clipping!",
--
2.10.2
