add a new reference clock which comes from 26M oscillator directly
for SuperSpeed analog phy. and the old one which comes for PLL is
48M for HighSpeed analog phy.

Signed-off-by: Chunfeng Yun <chunfeng....@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 12e7027..5d1663b 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -754,8 +754,8 @@
                u3phy: usb-phy@11290000 {
                        compatible = "mediatek,mt8173-u3phy";
                        reg = <0 0x11290000 0 0x800>;
-                       clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>;
-                       clock-names = "u3phya_ref";
+                       clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>, 
<&clk26m>;
+                       clock-names = "u2ref_clk", "u3ref_clk";
                        #address-cells = <2>;
                        #size-cells = <2>;
                        ranges;
-- 
1.7.9.5

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