On 06/02/17 12:15, Mars Cheng wrote:
> This adds basic chip support for MT6797 SoC.
>
> Signed-off-by: Mars Cheng <[email protected]>
> ---
> arch/arm64/boot/dts/mediatek/Makefile | 1 +
> arch/arm64/boot/dts/mediatek/mt6797-evb.dts | 36 ++++++
> arch/arm64/boot/dts/mediatek/mt6797.dtsi | 187
> +++++++++++++++++++++++++++
> 3 files changed, 224 insertions(+)
> create mode 100644 arch/arm64/boot/dts/mediatek/mt6797-evb.dts
> create mode 100644 arch/arm64/boot/dts/mediatek/mt6797.dtsi
>
> diff --git a/arch/arm64/boot/dts/mediatek/Makefile
> b/arch/arm64/boot/dts/mediatek/Makefile
> index 9fbfd32..015eb07 100644
> --- a/arch/arm64/boot/dts/mediatek/Makefile
> +++ b/arch/arm64/boot/dts/mediatek/Makefile
> @@ -1,5 +1,6 @@
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb
> dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
>
> always := $(dtb-y)
> diff --git a/arch/arm64/boot/dts/mediatek/mt6797-evb.dts
> b/arch/arm64/boot/dts/mediatek/mt6797-evb.dts
> new file mode 100644
> index 0000000..c79109c
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt6797-evb.dts
[...]
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_PPI 13
> + (GIC_CPU_MASK_SIMPLE(10) | IRQ_TYPE_LEVEL_LOW)>,
That's exactly why I positively hate these GIC_CPU_MASK_SIMPLE() and co.
They just hide all kind of sins:
- With GICv1/v2, this field can only be 8bit wide. Good luck shoving 10
CPUs there.
- GICv3 *doesn't* have any affinity bitmap in the binding (it can be
expressed in a very different way).
So please get rid of this GIC_CPU_MASK_SIMPLE, it is just wrong.
> + <GIC_PPI 14
> + (GIC_CPU_MASK_SIMPLE(10) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11
> + (GIC_CPU_MASK_SIMPLE(10) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10
> + (GIC_CPU_MASK_SIMPLE(10) | IRQ_TYPE_LEVEL_LOW)>;
> + };
> +
> + sysirq: intpol-controller@10200620 {
> + compatible = "mediatek,mt6797-sysirq",
> + "mediatek,mt6577-sysirq";
> + interrupt-controller;
> + #interrupt-cells = <3>;
> + #intpol-bases = <2>;
> + interrupt-parent = <&gic>;
> + reg = <0 0x10220620 0 0x20>,
> + <0 0x10220690 0 0x10>;
> + };
> +
> + uart0: serial@11002000 {
> + compatible = "mediatek,mt6797-uart",
> + "mediatek,mt6577-uart";
> + reg = <0 0x11002000 0 0x400>;
> + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&clk26m>;
> + status = "disabled";
> + };
> +
> + uart1: serial@11003000 {
> + compatible = "mediatek,mt6797-uart",
> + "mediatek,mt6577-uart";
> + reg = <0 0x11003000 0 0x400>;
> + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&clk26m>;
> + status = "disabled";
> + };
> +
> + uart2: serial@11004000 {
> + compatible = "mediatek,mt6797-uart",
> + "mediatek,mt6577-uart";
> + reg = <0 0x11004000 0 0x400>;
> + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&clk26m>;
> + status = "disabled";
> + };
> +
> + uart3: serial@11005000 {
> + compatible = "mediatek,mt6797-uart",
> + "mediatek,mt6577-uart";
> + reg = <0 0x11005000 0 0x400>;
> + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&clk26m>;
> + status = "disabled";
> + };
> +
> + gic: interrupt-controller@19000000 {
> + compatible = "arm,gic-v3";
> + #interrupt-cells = <3>;
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-controller;
> + reg = <0 0x19000000 0 0x10000>, /* GICD */
> + <0 0x19200000 0 0x200000>, /* GICR */
> + <0 0x10240000 0 0x2000>; /* GICC */
No GICH, no GICV, no ITS?
> + };
> +};
>
Thanks,
M.
--
Jazz is not dead. It just smells funny...
