On Fri, Feb 17, 2017 at 11:12 AM, Phil Reid <[email protected]> wrote: > When a threaded irq handler is chained attached to one of the gpio > pins when configure for level irq the altera_gpio_irq_leveL_high_handler > does not mask the interrupt while being handled by the chained irq. > This resulting in the threaded irq not getting enough cycles to complete > quickly enough before the irq was disabled as faulty. > It looks like handle_level_irq should be used in this situation > instead of handle_simple_irq.
> @@ -310,7 +310,8 @@ static int altera_gpio_probe(struct platform_device *pdev) > altera_gc->interrupt_trigger = reg; > > ret = gpiochip_irqchip_add(&altera_gc->mmchip.gc, &altera_irq_chip, 0, > - handle_simple_irq, IRQ_TYPE_NONE); > + altera_gc->interrupt_trigger == IRQ_TYPE_LEVEL_HIGH ? > + handle_level_irq : handle_simple_irq, IRQ_TYPE_NONE); AFAIK, handle_bad_irq() should be used here. -- With Best Regards, Andy Shevchenko
