On Tue, Mar 14, 2017 at 1:36 PM, Thomas Gleixner <t...@linutronix.de> wrote:
> On Sat, 11 Mar 2017, Kyle Huey wrote:
>>  static void init_intel_misc_features(struct cpuinfo_x86 *c)
>>  {
>>       u64 msr;
>>
>> +     if (rdmsrl_safe(MSR_MISC_FEATURES_ENABLES, &msr))
>> +             return;
>> +
>> +     msr = 0;
>> +     wrmsrl(MSR_MISC_FEATURES_ENABLES, msr);
>> +     this_cpu_write(msr_misc_features_shadow, msr);
>> +
>>       if (!rdmsrl_safe(MSR_PLATFORM_INFO, &msr)) {
>>               if (msr & MSR_PLATFORM_INFO_CPUID_FAULT)
>>                       set_cpu_cap(c, X86_FEATURE_CPUID_FAULT);
>>       }
>>
>>       probe_xeon_phi_r3mwait(c);
>
> The way you are doing it breaks the ring3 mwait feature because you
> overwrite the R3MWAIT bit the first time you update the MSR on context
> switch.

Indeed.  Good catch.

- Kyle

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