4.9-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Ben Skeggs <[email protected]>

[ Upstream commit 2a32b9b1866a2ee9f01fbf2a48d99012f0120739 ]

Signed-off-by: Ben Skeggs <[email protected]>
Signed-off-by: Sasha Levin <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
---
 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c  |   11 ++++++-----
 drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h  |   15 +++++++++------
 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursg84.c   |    2 +-
 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgf119.c |    2 +-
 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgk104.c |    2 +-
 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgt215.c |    2 +-
 drivers/gpu/drm/nouveau/nvkm/engine/disp/cursnv50.c  |    6 +++---
 drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c  |    2 +-
 drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmg84.c   |    2 +-
 drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmgf119.c |    2 +-
 drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmgk104.c |    2 +-
 drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmgt215.c |    2 +-
 drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmnv50.c  |    6 +++---
 drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c  |    4 ++--
 14 files changed, 32 insertions(+), 28 deletions(-)

--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.c
@@ -263,7 +263,7 @@ nv50_disp_chan = {
 int
 nv50_disp_chan_ctor(const struct nv50_disp_chan_func *func,
                    const struct nv50_disp_chan_mthd *mthd,
-                   struct nv50_disp_root *root, int chid, int head,
+                   struct nv50_disp_root *root, int ctrl, int user, int head,
                    const struct nvkm_oclass *oclass,
                    struct nv50_disp_chan *chan)
 {
@@ -273,8 +273,8 @@ nv50_disp_chan_ctor(const struct nv50_di
        chan->func = func;
        chan->mthd = mthd;
        chan->root = root;
-       chan->chid.ctrl = chid;
-       chan->chid.user = chid;
+       chan->chid.ctrl = ctrl;
+       chan->chid.user = user;
        chan->head = head;
 
        if (disp->chan[chan->chid.user]) {
@@ -288,7 +288,7 @@ nv50_disp_chan_ctor(const struct nv50_di
 int
 nv50_disp_chan_new_(const struct nv50_disp_chan_func *func,
                    const struct nv50_disp_chan_mthd *mthd,
-                   struct nv50_disp_root *root, int chid, int head,
+                   struct nv50_disp_root *root, int ctrl, int user, int head,
                    const struct nvkm_oclass *oclass,
                    struct nvkm_object **pobject)
 {
@@ -298,5 +298,6 @@ nv50_disp_chan_new_(const struct nv50_di
                return -ENOMEM;
        *pobject = &chan->object;
 
-       return nv50_disp_chan_ctor(func, mthd, root, chid, head, oclass, chan);
+       return nv50_disp_chan_ctor(func, mthd, root, ctrl, user,
+                                  head, oclass, chan);
 }
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/channv50.h
@@ -29,11 +29,11 @@ struct nv50_disp_chan_func {
 
 int nv50_disp_chan_ctor(const struct nv50_disp_chan_func *,
                        const struct nv50_disp_chan_mthd *,
-                       struct nv50_disp_root *, int chid, int head,
+                       struct nv50_disp_root *, int ctrl, int user, int head,
                        const struct nvkm_oclass *, struct nv50_disp_chan *);
 int nv50_disp_chan_new_(const struct nv50_disp_chan_func *,
                        const struct nv50_disp_chan_mthd *,
-                       struct nv50_disp_root *, int chid, int head,
+                       struct nv50_disp_root *, int ctrl, int user, int head,
                        const struct nvkm_oclass *, struct nvkm_object **);
 
 extern const struct nv50_disp_chan_func nv50_disp_pioc_func;
@@ -94,13 +94,16 @@ extern const struct nv50_disp_chan_mthd
 struct nv50_disp_pioc_oclass {
        int (*ctor)(const struct nv50_disp_chan_func *,
                    const struct nv50_disp_chan_mthd *,
-                   struct nv50_disp_root *, int chid,
+                   struct nv50_disp_root *, int ctrl, int user,
                    const struct nvkm_oclass *, void *data, u32 size,
                    struct nvkm_object **);
        struct nvkm_sclass base;
        const struct nv50_disp_chan_func *func;
        const struct nv50_disp_chan_mthd *mthd;
-       int chid;
+       struct {
+               int ctrl;
+               int user;
+       } chid;
 };
 
 extern const struct nv50_disp_pioc_oclass nv50_disp_oimm_oclass;
@@ -123,12 +126,12 @@ extern const struct nv50_disp_pioc_oclas
 
 int nv50_disp_curs_new(const struct nv50_disp_chan_func *,
                       const struct nv50_disp_chan_mthd *,
-                      struct nv50_disp_root *, int chid,
+                      struct nv50_disp_root *, int ctrl, int user,
                       const struct nvkm_oclass *, void *data, u32 size,
                       struct nvkm_object **);
 int nv50_disp_oimm_new(const struct nv50_disp_chan_func *,
                       const struct nv50_disp_chan_mthd *,
-                      struct nv50_disp_root *, int chid,
+                      struct nv50_disp_root *, int ctrl, int user,
                       const struct nvkm_oclass *, void *data, u32 size,
                       struct nvkm_object **);
 #endif
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/cursg84.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/cursg84.c
@@ -33,5 +33,5 @@ g84_disp_curs_oclass = {
        .base.maxver = 0,
        .ctor = nv50_disp_curs_new,
        .func = &nv50_disp_pioc_func,
-       .chid = 7,
+       .chid = { 7, 7 },
 };
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgf119.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgf119.c
@@ -33,5 +33,5 @@ gf119_disp_curs_oclass = {
        .base.maxver = 0,
        .ctor = nv50_disp_curs_new,
        .func = &gf119_disp_pioc_func,
-       .chid = 13,
+       .chid = { 13, 13 },
 };
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgk104.c
@@ -33,5 +33,5 @@ gk104_disp_curs_oclass = {
        .base.maxver = 0,
        .ctor = nv50_disp_curs_new,
        .func = &gf119_disp_pioc_func,
-       .chid = 13,
+       .chid = { 13, 13 },
 };
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgt215.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/cursgt215.c
@@ -33,5 +33,5 @@ gt215_disp_curs_oclass = {
        .base.maxver = 0,
        .ctor = nv50_disp_curs_new,
        .func = &nv50_disp_pioc_func,
-       .chid = 7,
+       .chid = { 7, 7 },
 };
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/cursnv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/cursnv50.c
@@ -33,7 +33,7 @@
 int
 nv50_disp_curs_new(const struct nv50_disp_chan_func *func,
                   const struct nv50_disp_chan_mthd *mthd,
-                  struct nv50_disp_root *root, int chid,
+                  struct nv50_disp_root *root, int ctrl, int user,
                   const struct nvkm_oclass *oclass, void *data, u32 size,
                   struct nvkm_object **pobject)
 {
@@ -54,7 +54,7 @@ nv50_disp_curs_new(const struct nv50_dis
        } else
                return ret;
 
-       return nv50_disp_chan_new_(func, mthd, root, chid + head,
+       return nv50_disp_chan_new_(func, mthd, root, ctrl + head, user + head,
                                   head, oclass, pobject);
 }
 
@@ -65,5 +65,5 @@ nv50_disp_curs_oclass = {
        .base.maxver = 0,
        .ctor = nv50_disp_curs_new,
        .func = &nv50_disp_pioc_func,
-       .chid = 7,
+       .chid = { 7, 7 },
 };
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.c
@@ -149,7 +149,7 @@ nv50_disp_dmac_new_(const struct nv50_di
        chan->func = func;
 
        ret = nv50_disp_chan_ctor(&nv50_disp_dmac_func_, mthd, root,
-                                 chid, head, oclass, &chan->base);
+                                 chid, chid, head, oclass, &chan->base);
        if (ret)
                return ret;
 
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmg84.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmg84.c
@@ -33,5 +33,5 @@ g84_disp_oimm_oclass = {
        .base.maxver = 0,
        .ctor = nv50_disp_oimm_new,
        .func = &nv50_disp_pioc_func,
-       .chid = 5,
+       .chid = { 5, 5 },
 };
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmgf119.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmgf119.c
@@ -33,5 +33,5 @@ gf119_disp_oimm_oclass = {
        .base.maxver = 0,
        .ctor = nv50_disp_oimm_new,
        .func = &gf119_disp_pioc_func,
-       .chid = 9,
+       .chid = { 9, 9 },
 };
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmgk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmgk104.c
@@ -33,5 +33,5 @@ gk104_disp_oimm_oclass = {
        .base.maxver = 0,
        .ctor = nv50_disp_oimm_new,
        .func = &gf119_disp_pioc_func,
-       .chid = 9,
+       .chid = { 9, 9 },
 };
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmgt215.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmgt215.c
@@ -33,5 +33,5 @@ gt215_disp_oimm_oclass = {
        .base.maxver = 0,
        .ctor = nv50_disp_oimm_new,
        .func = &nv50_disp_pioc_func,
-       .chid = 5,
+       .chid = { 5, 5 },
 };
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmnv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/oimmnv50.c
@@ -33,7 +33,7 @@
 int
 nv50_disp_oimm_new(const struct nv50_disp_chan_func *func,
                   const struct nv50_disp_chan_mthd *mthd,
-                  struct nv50_disp_root *root, int chid,
+                  struct nv50_disp_root *root, int ctrl, int user,
                   const struct nvkm_oclass *oclass, void *data, u32 size,
                   struct nvkm_object **pobject)
 {
@@ -54,7 +54,7 @@ nv50_disp_oimm_new(const struct nv50_dis
        } else
                return ret;
 
-       return nv50_disp_chan_new_(func, mthd, root, chid + head,
+       return nv50_disp_chan_new_(func, mthd, root, ctrl + head, user + head,
                                   head, oclass, pobject);
 }
 
@@ -65,5 +65,5 @@ nv50_disp_oimm_oclass = {
        .base.maxver = 0,
        .ctor = nv50_disp_oimm_new,
        .func = &nv50_disp_pioc_func,
-       .chid = 5,
+       .chid = { 5, 5 },
 };
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c
@@ -207,8 +207,8 @@ nv50_disp_root_pioc_new_(const struct nv
 {
        const struct nv50_disp_pioc_oclass *sclass = oclass->priv;
        struct nv50_disp_root *root = nv50_disp_root(oclass->parent);
-       return sclass->ctor(sclass->func, sclass->mthd, root, sclass->chid,
-                           oclass, data, size, pobject);
+       return sclass->ctor(sclass->func, sclass->mthd, root, sclass->chid.ctrl,
+                           sclass->chid.user, oclass, data, size, pobject);
 }
 
 static int


Reply via email to