The clock controller is getting more complex and it might be possible, in
the future, to have holes in the clk_hw_onecell_data array. Just make sure
we skip those holes if it ever happens.

Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
---
 drivers/clk/meson/gxbb.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index 75197664a7ee..28812ea41a60 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -1388,6 +1388,10 @@ static int gxbb_clkc_probe(struct platform_device *pdev)
         * register all clks
         */
        for (clkid = 0; clkid < clkc_data->hw_onecell_data->num; clkid++) {
+               /* array might be sparse */
+               if (!clkc_data->hw_onecell_data->hws[clkid])
+                       continue;
+
                ret = devm_clk_hw_register(dev,
                                        clkc_data->hw_onecell_data->hws[clkid]);
                if (ret)
-- 
2.9.3

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