On 04/03/2017 05:24 PM, Jon Hunter wrote:
On 03/04/17 13:42, Mikko Perttunen wrote:
The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
registers that initiate CPU frequency/voltage transitions.
Signed-off-by: Mikko Perttunen <mperttu...@nvidia.com>
---
.../arm/tegra/nvidia,tegra186-ccplex-cluster.txt | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
create mode 100644
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
diff --git
a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
new file mode 100644
index 000000000000..50cd615219e9
--- /dev/null
+++
b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-ccplex-cluster.txt
@@ -0,0 +1,22 @@
+NVIDIA Tegra CCPLEX_CLUSTER area
+
+Required properties:
+- compatible: Should contain one of the following:
+ - "nvidia,tegra186-ccplex-cluster": for Tegra186
Nit pick ... any reason why we append 'cluster' here? The TRM just says
the "CPU Complex" consists of two CPU clusters. So
"nvidia,tegra186-cpu-complex" or "nvidia,tegra186-ccplex" seems fine.
BTW, I do see references in the TRM to CCPLEX_CLUSTER0/1, but never
CCPLEX_CLUSTER in reference to both. I think it is just CCPLEX AFAICT.
The reason was that the MMIO aperture is called "CCPLEX_CLUSTER" in the
address map. But I agree it's not a very descriptive name.
Cheers
Jon
