Commit-ID:  c238f2343441e3995d2d4e993de42b072d005f4a
Gitweb:     http://git.kernel.org/tip/c238f2343441e3995d2d4e993de42b072d005f4a
Author:     Andy Shevchenko <andriy.shevche...@linux.intel.com>
AuthorDate: Thu, 16 Mar 2017 17:50:45 +0200
Committer:  Thomas Gleixner <t...@linutronix.de>
CommitDate: Fri, 14 Apr 2017 21:22:38 +0200

x86/cpu: Keep model defines sorted by model number

For better maintenance keep it sorted by numeric model ID. Add new lines to
seperate model groups.

Signed-off-by: Andy Shevchenko <andriy.shevche...@linux.intel.com>
Cc: Dave Hansen <dave.han...@linux.intel.com>
Link: 
http://lkml.kernel.org/r/20170316155045.50389-1-andriy.shevche...@linux.intel.com
Signed-off-by: Thomas Gleixner <t...@linutronix.de>

---
 arch/x86/include/asm/intel-family.h | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/intel-family.h 
b/arch/x86/include/asm/intel-family.h
index 9814db4..75b748a 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -12,6 +12,7 @@
  */
 
 #define INTEL_FAM6_CORE_YONAH          0x0E
+
 #define INTEL_FAM6_CORE2_MEROM         0x0F
 #define INTEL_FAM6_CORE2_MEROM_L       0x16
 #define INTEL_FAM6_CORE2_PENRYN                0x17
@@ -21,6 +22,7 @@
 #define INTEL_FAM6_NEHALEM_G           0x1F /* Auburndale / Havendale */
 #define INTEL_FAM6_NEHALEM_EP          0x1A
 #define INTEL_FAM6_NEHALEM_EX          0x2E
+
 #define INTEL_FAM6_WESTMERE            0x25
 #define INTEL_FAM6_WESTMERE_EP         0x2C
 #define INTEL_FAM6_WESTMERE_EX         0x2F
@@ -36,9 +38,9 @@
 #define INTEL_FAM6_HASWELL_GT3E                0x46
 
 #define INTEL_FAM6_BROADWELL_CORE      0x3D
-#define INTEL_FAM6_BROADWELL_XEON_D    0x56
 #define INTEL_FAM6_BROADWELL_GT3E      0x47
 #define INTEL_FAM6_BROADWELL_X         0x4F
+#define INTEL_FAM6_BROADWELL_XEON_D    0x56
 
 #define INTEL_FAM6_SKYLAKE_MOBILE      0x4E
 #define INTEL_FAM6_SKYLAKE_DESKTOP     0x5E
@@ -59,8 +61,8 @@
 #define INTEL_FAM6_ATOM_MERRIFIELD     0x4A /* Tangier */
 #define INTEL_FAM6_ATOM_MOOREFIELD     0x5A /* Anniedale */
 #define INTEL_FAM6_ATOM_GOLDMONT       0x5C
-#define INTEL_FAM6_ATOM_GEMINI_LAKE    0x7A
 #define INTEL_FAM6_ATOM_DENVERTON      0x5F /* Goldmont Microserver */
+#define INTEL_FAM6_ATOM_GEMINI_LAKE    0x7A
 
 /* Xeon Phi */
 

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