PCGCCTL1 (Power and Clock Control) register will be used for controlling the core`s active clock gating feature.
Signed-off-by: Razmik Karapetyan <[email protected]> --- drivers/usb/dwc2/hw.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/usb/dwc2/hw.h b/drivers/usb/dwc2/hw.h index 4592012..b726701 100644 --- a/drivers/usb/dwc2/hw.h +++ b/drivers/usb/dwc2/hw.h @@ -643,6 +643,10 @@ #define PCGCTL_GATEHCLK BIT(1) #define PCGCTL_STOPPCLK BIT(0) +#define PCGCCTL1 HSOTG_REG(0xe04) +#define PCGCCTL1_TIMER (0x3 << 1) +#define PCGCCTL1_GATEEN BIT(0) + #define EPFIFO(_a) HSOTG_REG(0x1000 + ((_a) * 0x1000)) /* Host Mode Registers */ -- 2.7.4
