On Fri, Apr 28, 2017 at 3:07 PM, Chris Brandt <chris.bra...@renesas.com> wrote: > On Friday, April 28, 2017, Linus Walleij wrote: >> > For me it looks like you are trying to alias open-drain + bias or >> > alike. Don't actually see the benefit of it. >> >> Andy is bringing up a valid point. And I remember asking about this before. >> >> What does "bi-directional" really mean, electrically speaking?
> Take the SDHI data pins. You send AND receive data over those pins (and they > are not open drain). Can you point to schematics and electrical characteristics of such buffer? (Yes, I can imagine one case where it's possible to have an "automatic" switch based on which current is bigger output of your side or remote's. But! I would like to see actual specifications to prove this or otherwise.) > The issue is that the PFC HW that enables the connections between the SDHI IP > block and the I/O pad buffers can only enable one path/signal/direction to > the buffer enables (in or out). So for a pin that needs both directions, the > PFC enables output and the "bidirectional register" is used to enable the > input buffer as well. > In the RZ/A1 HW manual you can kind of see that in 54.18 Port Control Logical > Diagram (but that wasn't obvious to me at first). Please, post a link to it or copy essential parts. I'm quite skeptical that cheap hardware can implement something more costable than simplest open-source / open-drain + bias. -- With Best Regards, Andy Shevchenko
