Hi Eric, > Eric Anholt <[email protected]> hat am 15. Mai 2017 um 19:35 geschrieben: > > > From: Phil Elwell <[email protected]> > > If a clock has the prediv flag set, both the integer and fractional > parts must be scaled when calculating the resulting frequency. > > Signed-off-by: Phil Elwell <[email protected]> > Signed-off-by: Eric Anholt <[email protected]> > --- > > While this is a bugfix, I haven't put a "Fixes:" line in here to get > it automatically backported to stable.
sorry, i can't follow. How should this happen without "Fixes: "? > We had trouble with the > out-of-tree DSI panel driver, at least: Our old set_rate() didn't > work, because the new PLL was just barely too fast to get the integer > PLL divider we needed. We may run into similar troubles > elsewhere. --anholt >
