Hi Alanatolij, I was just finally able to test this and your other change yesterday
On Thursday, April 20, 2017 11:43:01 PM PDT Anatolij Gustschin wrote: > Add a flag that is passed to the write_init() callback, > indicating that the SPI bitstream starts with LSB first. > SPI controllers usually send data with MSB first. If an > FPGA expects bitstream data as LSB first, the data must > be reversed either by the SPI controller or by the driver. > > Alternatively the bitstream could be prepared as bit-reversed > to avoid the bit-swapping while sending. This flag indicates > such bit-reversed SPI bitstream. The low-level driver will > deal with the flag and perform bit-reversing if needed. > > Signed-off-by: Anatolij Gustschin <[email protected]> > --- > include/linux/fpga/fpga-mgr.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h > index b4ac24c..5a055a0 100644 > --- a/include/linux/fpga/fpga-mgr.h > +++ b/include/linux/fpga/fpga-mgr.h > @@ -67,10 +67,13 @@ enum fpga_mgr_states { > * FPGA Manager flags > * FPGA_MGR_PARTIAL_RECONFIG: do partial reconfiguration if supported > * FPGA_MGR_EXTERNAL_CONFIG: FPGA has been configured prior to Linux > booting + * FPGA_MGR_SPI_BITSTREAM_LSB_FIRST: SPI bitstream bit order is > reversed to + * start with LSB first > */ > #define FPGA_MGR_PARTIAL_RECONFIG BIT(0) > #define FPGA_MGR_EXTERNAL_CONFIG BIT(1) > #define FPGA_MGR_ENCRYPTED_BITSTREAM BIT(2) > +#define FPGA_MGR_SPI_BITSTREAM_LSB_FIRST BIT(3) My thought here is that FPGA_MGR_BITSTREAM_LSB_FIRST is a bit shorter, adequate, and could do if another upload method happened to use LSB first organized data. > > /** > * struct fpga_image_info - information specific to a FPGA image I'll preparing an updated patch series including a version of your patches -- ~Joshua A Clayton
