On 5/19/2017 8:36 PM, Peter Zijlstra wrote:
On Fri, May 19, 2017 at 08:24:19PM +0800, Jin, Yao wrote:
Ah, I was more thinking of something like PERF_PMU_CAP_NO_SKID or
something that would skip the test and preserve current behaviour.
OK, I understand now. For example, for PEBS event, its capabilities should
be set with PERF_PMU_CAP_NO_SKID.
Except you cannot in fact do that, since PEBS is the same struct pmu as
the normal counters (they share counter space after all).
Also, weren't there PEBS errata that would allow this to happen?
But no, more for other architectures to opt out for some reason. But I'm
thinking we want to start out by unconditionally doing this. It would be
good to try and Cc most arch pmu maintainers on this though, so they can
object.
I'm thinking v2 of patch will only do simple tasks:
1. Define PERF_PMU_CAP_NO_SKID but don't bind it to any event.
2. Move the skid checking from x86 specific code to generic code. Before
performing skid checking, test the PERF_PMU_CAP_NO_SKID bit first.
For binding PERF_PMU_CAP_NO_SKID to event, that may be other arch
related patches.
Thanks
Jin Yao
