On Tue, May 02, 2017 at 07:35:37PM +0530, Laxman Dewangan wrote: > The PWM hardware IP is taped-out with different maximum frequency > on different SoCs. > > From HW team: > Before Tegra186, it is 38.4MHz. > In Tegra186, it is 102MHz. > > Add support to limit the clock source frequency to the maximum IP > supported frequency. Provide these values via SoC chipdata. > > Signed-off-by: Laxman Dewangan <[email protected]> > > --- > Changes from V1: > - Set the 48MHz maximum frequency for Tegra210 and earlier. > - Set the maximum frequency unconditionally as per V1 review comment. > --- > drivers/pwm/pwm-tegra.c | 18 +++++++++++++++++- > 1 file changed, 17 insertions(+), 1 deletion(-)
Applied with a fixed up commit message and Jon's Acked-by. Thanks, Thierry
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