The hardware strap register(SCU70) only accepts write ‘1’, to clear it to ‘0’, must set bits(write ‘1’) to SCU7C
Signed-off-by: Yong Li <[email protected]> --- drivers/pinctrl/aspeed/pinctrl-aspeed.c | 9 +++++++-- drivers/pinctrl/aspeed/pinctrl-aspeed.h | 1 + 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c index a86a4d6..4305052 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c @@ -213,8 +213,13 @@ static int aspeed_sig_expr_set(const struct aspeed_sig_expr *expr, if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP2) continue; - ret = regmap_update_bits(maps[desc->ip], desc->reg, - desc->mask, val); + if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP1 && + val == 0) + ret = regmap_update_bits(maps[desc->ip], HW_REVISION_ID, + desc->mask, desc->mask); + else + ret = regmap_update_bits(maps[desc->ip], desc->reg, + desc->mask, val); if (ret) return ret; diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.h b/drivers/pinctrl/aspeed/pinctrl-aspeed.h index fa125db..d4d7f03 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.h +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.h @@ -251,6 +251,7 @@ #define SCU3C 0x3C /* System Reset Control/Status Register */ #define SCU48 0x48 /* MAC Interface Clock Delay Setting */ #define HW_STRAP1 0x70 /* AST2400 strapping is 33 bits, is split */ +#define HW_REVISION_ID 0x7C /* Silicon revision ID register */ #define SCU80 0x80 /* Multi-function Pin Control #1 */ #define SCU84 0x84 /* Multi-function Pin Control #2 */ #define SCU88 0x88 /* Multi-function Pin Control #3 */ -- 2.7.4
