On Fri, 11 Aug 2017, Mark Rutland wrote:

> IIUC by 'rdpmc' you mean direct userspace counter access?
> Patches for that never made it upstream. Last I saw, there were no
> patches in a suitable state for review.

yes, someone from Linaro sent me some code a while back that implemented 
the userspace side and claimed the kernel patches would appear at some 
point.  I should try to dig up that e-mail.

The "rdpmc" code looked something like this
        if (counter == PERF_COUNT_HW_CPU_CYCLES)
                asm volatile("mrs %0, pmccntr_el0" : "=r" (ret));
        else {
                asm volatile("msr pmselr_el0, %0" : : "r" ((counter-1)));
                asm volatile("mrs %0, pmxevcntr_el0" : "=r" (ret));

> > On ARM/ARM64 you can only mmap() it once, any other attempts fail.
> Interesting. Which platform(s) are you testing on, with which kernel
> version(s)?

This is on a Dragonbaord 401c running a vendor 64-bit 4.4 kernel,
a Nvidia Jetson TX-1 board running a 64-bit 3.10 vendor kernel,
as well as a Raspberry Pi 3B running a 32-bit 4.9 pi foundation kernel.

It's a pain getting a recent-git kernel on these boards but I'm most of 
the way to getting one booting on the Pi 3B.  (got distracted by the fact 
that Linpack still reliably crashes the Pi-3b even with a heatsink).

Here's strace from the Dragonboard:
perf_event_open(0x7fc649e900, 0, -1, -1, 0) = 3
mmap(NULL, 36864, PROT_READ|PROT_WRITE, MAP_SHARED, 3, 0) = 0x7f7e1b1000
mmap(NULL, 36864, PROT_READ|PROT_WRITE, MAP_SHARED, 3, 0) = -1 EINVAL (Invalid 


Reply via email to