Hi Marc, On Tuesday, 15 August 2017 04:34:46 PDT Marc Zyngier wrote: > The MIPS GIC driver only targets a single CPU at a time, even if > the notional affinity is wider. Let's inform the core code > about this. > > Signed-off-by: Marc Zyngier <[email protected]> > --- > drivers/irqchip/Kconfig | 1 + > drivers/irqchip/irq-mips-gic.c | 2 ++ > 2 files changed, 3 insertions(+) > > diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig > index 39bfa5b25b54..bca9a88012f0 100644 > --- a/drivers/irqchip/Kconfig > +++ b/drivers/irqchip/Kconfig > @@ -141,6 +141,7 @@ config IRQ_MIPS_CPU > select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING > select IRQ_DOMAIN > select IRQ_DOMAIN_HIERARCHY if GENERIC_IRQ_IPI > + select GENERIC_IRQ_EFFECTIVE_AFF_MASK > > config CLPS711X_IRQCHIP > bool > diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c > index 6ab1d3afec02..e075cb25fad6 100644 > --- a/drivers/irqchip/irq-mips-gic.c > +++ b/drivers/irqchip/irq-mips-gic.c > @@ -463,6 +463,7 @@ static int gic_set_affinity(struct irq_data *d, const > struct cpumask *cpumask, set_bit(irq, > pcpu_masks[cpumask_first(&tmp)].pcpu_mask); > > cpumask_copy(irq_data_get_affinity_mask(d), cpumask); > + irq_data_update_effective_affinity(d, cpumask);
This doesn't seem right - it's just setting the effective affinity to the same
as affinity, not taking into account CPU restrictions at all. I think this
should be:
irq_data_update_effective_affinity(d, cpumask_of(cpumask_first(&tmp)));
(or something cleaner but to that effect)
Thanks,
Paul
> spin_unlock_irqrestore(&gic_lock, flags);
>
> return IRQ_SET_MASK_OK_NOCOPY;
> @@ -716,6 +717,7 @@ static int gic_irq_domain_map(struct irq_domain *d,
> unsigned int virq, if (err)
> return err;
>
> +
> irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq)));
> return gic_shared_irq_domain_map(d, virq, hwirq, 0);
> }
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