* Kirill A. Shutemov <[email protected]> wrote:
> This patch adds detection of 5-level paging at boot-time and adjusts
> virtual memory layout and folds p4d page table layer if needed.
>
> We have to make X86_5LEVEL dependant on SPARSEMEM_VMEMMAP.
> !SPARSEMEM_VMEMMAP configuration doesn't work well with variable
> MAX_PHYSMEM_BITS.
>
> Signed-off-by: Kirill A. Shutemov <[email protected]>
> ---
> arch/x86/Kconfig | 1 +
> arch/x86/boot/compressed/kaslr.c | 13 +++++--
> arch/x86/entry/entry_64.S | 12 +++++++
> arch/x86/include/asm/page_64_types.h | 13 +++----
> arch/x86/include/asm/pgtable_64_types.h | 35 +++++++++++--------
> arch/x86/include/asm/processor.h | 2 +-
> arch/x86/include/asm/sparsemem.h | 9 ++---
> arch/x86/kernel/head64.c | 60
> ++++++++++++++++++++++++++-------
> arch/x86/kernel/head_64.S | 18 ++++++----
> arch/x86/kernel/setup.c | 5 ++-
> arch/x86/mm/dump_pagetables.c | 8 +++--
> arch/x86/mm/kaslr.c | 13 ++++---
> 12 files changed, 129 insertions(+), 60 deletions(-)
Please also split this patch up some more, into as many individual (but
bisectable) changes as possible.
> diff --git a/arch/x86/include/asm/sparsemem.h
> b/arch/x86/include/asm/sparsemem.h
> index 1f5bee2c202f..ba67afd870b7 100644
> --- a/arch/x86/include/asm/sparsemem.h
> +++ b/arch/x86/include/asm/sparsemem.h
> @@ -26,13 +26,8 @@
> # endif
> #else /* CONFIG_X86_32 */
> # define SECTION_SIZE_BITS 27 /* matt - 128 is convenient right now */
> -# ifdef CONFIG_X86_5LEVEL
> -# define MAX_PHYSADDR_BITS 52
> -# define MAX_PHYSMEM_BITS 52
> -# else
> -# define MAX_PHYSADDR_BITS 44
> -# define MAX_PHYSMEM_BITS 46
> -# endif
> +# define MAX_PHYSADDR_BITS (p4d_folded ? 44 : 52)
> +# define MAX_PHYSMEM_BITS (p4d_folded ? 46 : 52)
> #endif
The kernel code size impact of these de-constification changes should be
measured,
double checked and documented as well. We are adding all kinds of overhead to
(what I expect to be) commonly used kernels, let's do it carefully.
Thanks,
Ingo
