Gentle ping? Dinh
On 09/22/2017 01:42 PM, Dinh Nguyen wrote: > The SoCFPGA Stratix10 reset controller has 32-bit registers. Thus, we > cannot use BITS_PER_LONG in computing the register and bit offset. Instead, > we should be using the width of the hardware register for the calculation. > > Signed-off-by: Dinh Nguyen <[email protected]> > --- > drivers/reset/reset-socfpga.c | 17 ++++++++++------- > 1 file changed, 10 insertions(+), 7 deletions(-) > > diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c > index c60904f..3907bbc 100644 > --- a/drivers/reset/reset-socfpga.c > +++ b/drivers/reset/reset-socfpga.c > @@ -40,8 +40,9 @@ static int socfpga_reset_assert(struct reset_controller_dev > *rcdev, > struct socfpga_reset_data *data = container_of(rcdev, > struct socfpga_reset_data, > rcdev); > - int bank = id / BITS_PER_LONG; > - int offset = id % BITS_PER_LONG; > + int reg_width = sizeof(u32); > + int bank = id / (reg_width * BITS_PER_BYTE); > + int offset = id % (reg_width * BITS_PER_BYTE); > unsigned long flags; > u32 reg; > > @@ -61,8 +62,9 @@ static int socfpga_reset_deassert(struct > reset_controller_dev *rcdev, > struct socfpga_reset_data, > rcdev); > > - int bank = id / BITS_PER_LONG; > - int offset = id % BITS_PER_LONG; > + int reg_width = sizeof(u32); > + int bank = id / (reg_width * BITS_PER_BYTE); > + int offset = id % (reg_width * BITS_PER_BYTE); > unsigned long flags; > u32 reg; > > @@ -81,8 +83,9 @@ static int socfpga_reset_status(struct reset_controller_dev > *rcdev, > { > struct socfpga_reset_data *data = container_of(rcdev, > struct socfpga_reset_data, > rcdev); > - int bank = id / BITS_PER_LONG; > - int offset = id % BITS_PER_LONG; > + int reg_width = sizeof(u32); > + int bank = id / (reg_width * BITS_PER_BYTE); > + int offset = id % (reg_width * BITS_PER_BYTE); > u32 reg; > > reg = readl(data->membase + (bank * BANK_INCREMENT)); > @@ -132,7 +135,7 @@ static int socfpga_reset_probe(struct platform_device > *pdev) > spin_lock_init(&data->lock); > > data->rcdev.owner = THIS_MODULE; > - data->rcdev.nr_resets = NR_BANKS * BITS_PER_LONG; > + data->rcdev.nr_resets = NR_BANKS * (sizeof(u32) * BITS_PER_BYTE); > data->rcdev.ops = &socfpga_reset_ops; > data->rcdev.of_node = pdev->dev.of_node; > >
