Commit-ID: 6c66350d0a482892793b888b07c1177fc6d4b344 Gitweb: https://git.kernel.org/tip/6c66350d0a482892793b888b07c1177fc6d4b344 Author: [email protected] <[email protected]> AuthorDate: Thu, 12 Oct 2017 11:32:05 -0500 Committer: Thomas Gleixner <[email protected]> CommitDate: Mon, 16 Oct 2017 22:50:37 +0200
x86/tsc: Provide a means to disable TSC ART On systems where multiple chassis are reset asynchronously, and thus the TSC counters are started asynchronously, the offset needed to convert to TSC to ART would be different. Disable ART in that case and rely on the TSC counters to supply the accurate time. Signed-off-by: Mike Travis <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Reviewed-by: Thomas Gleixner <[email protected]> Cc: Prarit Bhargava <[email protected]> Cc: Dimitri Sivanich <[email protected]> Cc: Russ Anderson <[email protected]> Cc: Andrew Banman <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Bin Gao <[email protected]> Link: https://lkml.kernel.org/r/[email protected] --- arch/x86/kernel/tsc.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 896dbe3..f1326c0 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -962,10 +962,14 @@ static void detect_art(void) if (boot_cpu_data.cpuid_level < ART_CPUID_LEAF) return; - /* Don't enable ART in a VM, non-stop TSC and TSC_ADJUST required */ + /* + * Don't enable ART in a VM, non-stop TSC and TSC_ADJUST required, + * and the TSC counter resets must not occur asynchronously. + */ if (boot_cpu_has(X86_FEATURE_HYPERVISOR) || !boot_cpu_has(X86_FEATURE_NONSTOP_TSC) || - !boot_cpu_has(X86_FEATURE_TSC_ADJUST)) + !boot_cpu_has(X86_FEATURE_TSC_ADJUST) || + tsc_async_resets) return; cpuid(ART_CPUID_LEAF, &art_to_tsc_denominator,
