GPIO1 control register is number 51, fix this here.
Fixes: bafcbfe429eb ("ASoC: tlv320aic31xx: Make the register values human
readable")
Signed-off-by: Andrew F. Davis <[email protected]>
---
sound/soc/codecs/tlv320aic31xx.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/codecs/tlv320aic31xx.h b/sound/soc/codecs/tlv320aic31xx.h
index db95eeae966b..4f126cd82add 100644
--- a/sound/soc/codecs/tlv320aic31xx.h
+++ b/sound/soc/codecs/tlv320aic31xx.h
@@ -82,7 +82,7 @@ struct aic31xx_pdata {
#define AIC31XX_INTRADCFLAG2 AIC31XX_REG(0, 47) /* ADC Interrupt flags 2 */
#define AIC31XX_INT1CTRL AIC31XX_REG(0, 48) /* INT1 interrupt control */
#define AIC31XX_INT2CTRL AIC31XX_REG(0, 49) /* INT2 interrupt control */
-#define AIC31XX_GPIO1 AIC31XX_REG(0, 50) /* GPIO1 control */
+#define AIC31XX_GPIO1 AIC31XX_REG(0, 51) /* GPIO1 control */
#define AIC31XX_DACPRB AIC31XX_REG(0, 60)
#define AIC31XX_ADCPRB AIC31XX_REG(0, 61) /* ADC Instruction Set
Register */
#define AIC31XX_DACSETUP AIC31XX_REG(0, 63) /* DAC channel setup
register */
--
2.15.0
