* Kirill A. Shutemov <[email protected]> wrote:
> This patch prepare decompression code to boot-time switching between 4-
> and 5-level paging.
>
> Signed-off-by: Kirill A. Shutemov <[email protected]>
> ---
> arch/x86/boot/compressed/head_64.S | 16 ++++++++++++----
> arch/x86/boot/compressed/pagetable.c | 19 +++++++++++++++++++
> 2 files changed, 31 insertions(+), 4 deletions(-)
>
> diff --git a/arch/x86/boot/compressed/head_64.S
> b/arch/x86/boot/compressed/head_64.S
> index b4a5d284391c..6ac8239af2b6 100644
> --- a/arch/x86/boot/compressed/head_64.S
> +++ b/arch/x86/boot/compressed/head_64.S
> @@ -288,10 +288,18 @@ ENTRY(startup_64)
> leaq boot_stack_end(%rbx), %rsp
>
> #ifdef CONFIG_X86_5LEVEL
> - /* Check if 5-level paging has already enabled */
> - movq %cr4, %rax
> - testl $X86_CR4_LA57, %eax
> - jnz lvl5
> + /*
> + * Check if we need to enable 5-level paging.
> + * RSI holds real mode data and need to be preserved across
> + * a function call.
> + */
> + pushq %rsi
> + call need_to_enabled_l5
> + popq %rsi
> +
> + /* If need_to_enabled_l5() returned zero, we're done here. */
> + cmpq $0, %rax
> + je lvl5
>
> /*
> * At this point we are in long mode with 4-level paging enabled,
> diff --git a/arch/x86/boot/compressed/pagetable.c
> b/arch/x86/boot/compressed/pagetable.c
> index a15bbfcb3413..cd2dd49333cc 100644
> --- a/arch/x86/boot/compressed/pagetable.c
> +++ b/arch/x86/boot/compressed/pagetable.c
> @@ -154,3 +154,22 @@ void finalize_identity_maps(void)
> }
>
> #endif /* CONFIG_RANDOMIZE_BASE */
> +
> +#ifdef CONFIG_X86_5LEVEL
> +int need_to_enabled_l5(void)
> +{
> + /* Check i leaf 7 is supported. */
> + if (native_cpuid_eax(0) < 7)
> + return 0;
> +
> + /* Check if la57 is supported. */
> + if (!(native_cpuid_ecx(7) & (1 << (X86_FEATURE_LA57 & 31))))
> + return 0;
> +
> + /* Check if 5-level paging has already been enabled. */
> + if (native_read_cr4() & X86_CR4_LA57)
> + return 0;
> +
> + return 1;
> +}
> +#endif
Ok, I like this a lot better than doing this at the assembly level - and this
could provide a model for how to further reduce assembly code.
Thanks,
Ingo
