On Fri, Nov 24, 2017 at 02:31:13AM +0000, Y.b. Lu wrote:
> Any comments?
> 
> +Shawn

Please resend with me on copy.

> 
> Thanks.
> 
> -----Original Message-----
> From: Yangbo Lu [mailto:[email protected]] 
> Sent: 2017年11月10日 9:59
> To: [email protected]; [email protected]; 
> [email protected]; Rob Herring <[email protected]>; Mark 
> Rutland <[email protected]>; Russell King <[email protected]>
> Cc: Y.b. Lu <[email protected]>
> Subject: [PATCH] arm: dts: ls1021a: fix the value of TMR_FIPER1

ARM: dts: ...

> 
> The timer fixed interval period pulse generator register is used to generate 
> periodic pulses. The down count register loads the value programmed in the 
> fixed period interval (FIPER). At every tick of the timer accumulator 
> overflow, the counter decrements by the value of TMR_CTRL[TCLK_PERIOD]. It 
> generates a pulse when the down counter value reaches zero. It reloads the 
> down counter in the cycle following a pulse. To use the TMR_FIPER1 register 
> to generate a 1 PPS event, the value

Please wrap the commit log properly.

Shawn

> (10^9 nanoseconds) - TCLK_PERIOD should be programmed.
> It should be 999999995 not 999999990 since TCLK_PERIOD is 5.
> 
> Signed-off-by: Yangbo Lu <[email protected]>
> ---
>  arch/arm/boot/dts/ls1021a.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi 
> index 9319e1f0f1d8..10e536f338f7 100644
> --- a/arch/arm/boot/dts/ls1021a.dtsi
> +++ b/arch/arm/boot/dts/ls1021a.dtsi
> @@ -575,7 +575,7 @@
>                       fsl,tclk-period = <5>;
>                       fsl,tmr-prsc    = <2>;
>                       fsl,tmr-add     = <0xaaaaaaab>;
> -                     fsl,tmr-fiper1  = <999999990>;
> +                     fsl,tmr-fiper1  = <999999995>;
>                       fsl,tmr-fiper2  = <99990>;
>                       fsl,max-adj     = <499999999>;
>               };
> --
> 2.14.1
> 
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