On 27/11/2017 21:23, Luwei Kang wrote:
> From: Chao Peng <[email protected]>
> 
> Expose Intel Processor Trace to guest only when PT work in
> HOST_GUEST mode.
> 
> Signed-off-by: Chao Peng <[email protected]>
> Signed-off-by: Luwei Kang <[email protected]>
> Signed-off-by: Paolo Bonzini <[email protected]>
> ---
>  arch/x86/include/asm/cpufeatures.h |  2 +-
>  arch/x86/include/asm/kvm_host.h    |  1 +
>  arch/x86/kernel/cpu/scattered.c    |  1 -
>  arch/x86/kvm/cpuid.c               | 22 ++++++++++++++++++++--
>  arch/x86/kvm/svm.c                 |  6 ++++++
>  arch/x86/kvm/vmx.c                 |  6 ++++++
>  6 files changed, 34 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/x86/include/asm/cpufeatures.h 
> b/arch/x86/include/asm/cpufeatures.h
> index c0b0e9e..3e03cbe 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -203,7 +203,6 @@
>  #define X86_FEATURE_SME                      ( 7*32+10) /* AMD Secure Memory 
> Encryption */
>  
>  #define X86_FEATURE_INTEL_PPIN               ( 7*32+14) /* Intel Processor 
> Inventory Number */
> -#define X86_FEATURE_INTEL_PT         ( 7*32+15) /* Intel Processor Trace */
>  #define X86_FEATURE_AVX512_4VNNIW    ( 7*32+16) /* AVX-512 Neural Network 
> Instructions */
>  #define X86_FEATURE_AVX512_4FMAPS    ( 7*32+17) /* AVX-512 Multiply 
> Accumulation Single precision */
>  
> @@ -242,6 +241,7 @@
>  #define X86_FEATURE_AVX512IFMA               ( 9*32+21) /* AVX-512 Integer 
> Fused Multiply-Add instructions */
>  #define X86_FEATURE_CLFLUSHOPT               ( 9*32+23) /* CLFLUSHOPT 
> instruction */
>  #define X86_FEATURE_CLWB             ( 9*32+24) /* CLWB instruction */
> +#define X86_FEATURE_INTEL_PT         ( 9*32+25) /* Intel Processor Trace */

These parts should be in a separate patch.

Paolo

>  #define X86_FEATURE_AVX512PF         ( 9*32+26) /* AVX-512 Prefetch */
>  #define X86_FEATURE_AVX512ER         ( 9*32+27) /* AVX-512 Exponential and 
> Reciprocal */
>  #define X86_FEATURE_AVX512CD         ( 9*32+28) /* AVX-512 Conflict 
> Detection */
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index 1bfb997..d0b99ae 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -1004,6 +1004,7 @@ struct kvm_x86_ops {
>       void (*handle_external_intr)(struct kvm_vcpu *vcpu);
>       bool (*mpx_supported)(void);
>       bool (*xsaves_supported)(void);
> +     bool (*pt_supported)(void);
>  
>       int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr);
>  
> diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
> index 05459ad..d0e6976 100644
> --- a/arch/x86/kernel/cpu/scattered.c
> +++ b/arch/x86/kernel/cpu/scattered.c
> @@ -21,7 +21,6 @@ struct cpuid_bit {
>  static const struct cpuid_bit cpuid_bits[] = {
>       { X86_FEATURE_APERFMPERF,       CPUID_ECX,  0, 0x00000006, 0 },
>       { X86_FEATURE_EPB,              CPUID_ECX,  3, 0x00000006, 0 },
> -     { X86_FEATURE_INTEL_PT,         CPUID_EBX, 25, 0x00000007, 0 },
>       { X86_FEATURE_AVX512_4VNNIW,    CPUID_EDX,  2, 0x00000007, 0 },
>       { X86_FEATURE_AVX512_4FMAPS,    CPUID_EDX,  3, 0x00000007, 0 },
>       { X86_FEATURE_CAT_L3,           CPUID_EBX,  1, 0x00000010, 0 },
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index 0099e10..608794f 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -327,6 +327,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 
> *entry, u32 function,
>       unsigned f_invpcid = kvm_x86_ops->invpcid_supported() ? F(INVPCID) : 0;
>       unsigned f_mpx = kvm_mpx_supported() ? F(MPX) : 0;
>       unsigned f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0;
> +     unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0;
>  
>       /* cpuid 1.edx */
>       const u32 kvm_cpuid_1_edx_x86_features =
> @@ -379,7 +380,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 
> *entry, u32 function,
>               F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) |
>               F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) |
>               F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | 
> F(AVX512DQ) |
> -             F(SHA_NI) | F(AVX512BW) | F(AVX512VL);
> +             F(SHA_NI) | F(AVX512BW) | F(AVX512VL) | f_intel_pt;
>  
>       /* cpuid 0xD.1.eax */
>       const u32 kvm_cpuid_D_1_eax_x86_features =
> @@ -407,7 +408,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 
> *entry, u32 function,
>  
>       switch (function) {
>       case 0:
> -             entry->eax = min(entry->eax, (u32)0xd);
> +             entry->eax = min(entry->eax, (u32)(f_intel_pt ? 0x14 : 0xd));
>               break;
>       case 1:
>               entry->edx &= kvm_cpuid_1_edx_x86_features;
> @@ -578,6 +579,23 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 
> *entry, u32 function,
>               }
>               break;
>       }
> +     /* Intel PT */
> +     case 0x14: {
> +             int t, times = entry->eax & 0xffffffff;
> +
> +             if (!f_intel_pt)
> +                     break;
> +
> +             entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
> +             for (t = 1; t <= times; ++t) {
> +                     if (*nent >= maxnent)
> +                             goto out;
> +                     do_cpuid_1_ent(&entry[t], function, t);
> +                     entry[t].flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
> +                     ++*nent;
> +             }
> +             break;
> +     }
>       case KVM_CPUID_SIGNATURE: {
>               static const char signature[12] = "KVMKVMKVM\0\0";
>               const u32 *sigptr = (const u32 *)signature;
> diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
> index 59e13a7..c579272 100644
> --- a/arch/x86/kvm/svm.c
> +++ b/arch/x86/kvm/svm.c
> @@ -5195,6 +5195,11 @@ static bool svm_xsaves_supported(void)
>       return false;
>  }
>  
> +static bool svm_pt_supported(void)
> +{
> +     return false;
> +}
> +
>  static bool svm_has_wbinvd_exit(void)
>  {
>       return true;
> @@ -5588,6 +5593,7 @@ static int enable_smi_window(struct kvm_vcpu *vcpu)
>       .invpcid_supported = svm_invpcid_supported,
>       .mpx_supported = svm_mpx_supported,
>       .xsaves_supported = svm_xsaves_supported,
> +     .pt_supported = svm_pt_supported,
>  
>       .set_supported_cpuid = svm_set_supported_cpuid,
>  
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index 73da8a2..d8ad68a 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -9219,6 +9219,11 @@ static bool vmx_xsaves_supported(void)
>               SECONDARY_EXEC_XSAVES;
>  }
>  
> +static bool vmx_pt_supported(void)
> +{
> +     return (pt_mode == PT_MODE_HOST_GUEST);
> +}
> +
>  static void vmx_recover_nmi_blocking(struct vcpu_vmx *vmx)
>  {
>       u32 exit_intr_info;
> @@ -12221,6 +12226,7 @@ static int enable_smi_window(struct kvm_vcpu *vcpu)
>       .handle_external_intr = vmx_handle_external_intr,
>       .mpx_supported = vmx_mpx_supported,
>       .xsaves_supported = vmx_xsaves_supported,
> +     .pt_supported = vmx_pt_supported,
>  
>       .check_nested_events = vmx_check_nested_events,
>  
> 

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